跳至內容

用戶:MofuMoca/異構系統架構

維基百科,自由的百科全書
在非HSA系統中使用GPU執行分擔運算的步驟
在HSA系統中使用GPU執行分擔運算的步驟,使用HSA的功能

異構系統架構(Heterogeneous System Architecture,HSA) ,是一種中央處理器圖形處理器共享匯流排記憶體處理程序電腦處理器架構[1] HSA由HSA基金會開發,其中包含AMDARM。HSA起始目標是為了減少CPU、GPU以及其他計算單元之間的溝通延遲,並且從程式設計師的角度來看,[2]:3[3] 能夠讓許多設備更相容,減少程式設計師去規劃資料在裝置間所互不相通之記憶體中移動的程序(必須透過OpenCLCUDA)。[4] 異構計算廣泛地被使用在系統單晶片裝置中,像是平板電腦智能手機以及其他流動裝置。[5] HSA允許程式使用圖形處理器(GPU)去計算浮點數,而不須調度或獨立的記憶體。[6]

概覽

[編輯]

HSA is a set of features defining a system architecture that intends to make heterogeneous computing more mainstream. Heterogeneous computing itself refers to systems that contain multiples processing units – central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), or any type of application-specific integrated circuits (ASICs). The system architecture allows any accelerator, for instance a graphics processor, to operate at the same processing level as the system's CPU.

Among its main features, HSA defines a unified virtual address space space for compute devices: where GPUs traditionally have their own memory, separate from the main (CPU) memory, HSA requires these devices to share page tables so that devices can exchange data by sharing pointers. This is to be supported by custom memory management units.[2]:6–7 To render interoperability possible and also to ease various aspects of programming, HSA is intended to be ISA-agnostic for both CPUs and accelerators, and to support high-level programming languages.

So far, the HSA specifications cover:

  • HSA Intermediate Layer (HSAIL), a virtual instruction set for parallel programs
  • HSA memory model
    • compatible with C++11, OpenCL, Java and .NET memory models
    • relaxed consistency
    • designed to support both managed languages (e.g. Java) and unmanaged languages (e.g. C)
    • will make it much easier to develop 3rd-party compilers for a wide range of heterogeneous products programmed in Fortran, C++, C++ AMP, Java, et al.
  • HSA dispatcher and run-time
    • designed to enable heterogeneous task queueing: a work queue per core, distribution of work into queues, load balancing by work stealing
    • any core can schedule work for any other, including itself
    • significant reduction of overhead of scheduling work for a core

Mobile devices are one of the HSA's application areas, in which it yields improved power efficiency.[5]

方塊圖

[編輯]

The block diagrams below provide high-level illustrations of how HSA operates and compares to traditional architectures.

軟件支援

[編輯]
AMD GPUs contain certain additional functional units intended to be used as part of HSA. In Linux, kernel driver amdkfd provides required support.[8][9]

Some of the HSA-specific features implemented in the hardware need to be supported by the operating system kernel and specific device drivers. For example, support for AMD Radeon and AMD FirePro graphics cards, and APUs based on so-called Graphics Core Next (GCN), was merged into version 3.19 of the Linux kernel mainline, released on February 8, 2015.[9] Programs do not interact directly with amdkfd, but queue their jobs utilizing the HSA runtime.[10] This very first implementation, known as amdkfd, focuses on "Kaveri" or "Berlin" APUs and works alongside the existing Radeon kernel graphics driver.

Additionally, amdkfd supports so-called heterogeneous queuing (HQ), which aims to simplify the distribution of computational jobs among multiple CPUs and GPUs from the programmer's perspective. 截至2015年2月 (2015-02), support for heterogeneous memory management, suited only for graphics hardware featuring version 2 of the AMD's IOMMU, has not yet been accepted into the Linux kernel mainline.

Integrated support for HSA platforms has been announced for the "Sumatra" release of OpenJDK, due in 2015.[11]

AMD APP SDK is AMD's proprietary software development kit targeting parallel computing, available for Microsoft Windows and Linux. Bolt is a C++ template library optimized for heterogeneous computing.[12]

硬件支援

[編輯]

截至2015年2月 (2015-02), only AMD's "Kaveri" A-series APUs (cf. "Kaveri" desktop processors and "Kaveri" mobile processors) and Sony's PlayStation 4 contain version 2 of the AMD's IOMMU.

Template:AMD APU features

參見

[編輯]

參考資料

[編輯]
  1. ^ Tarun Iyer. AMD Unveils its Heterogeneous Uniform Memory Access (hUMA) Technology. Tom's Hardware. 30 April 2013. 
  2. ^ 2.0 2.1 George Kyriazis. Heterogeneous System Architecture: A Technical Review (PDF) (報告). AMD. 30 August 2012. 
  3. ^ What is Heterogeneous System Architecture (HSA)?. AMD. [23 May 2014]. 
  4. ^ Joel Hruska. Setting HSAIL: AMD explains the future of CPU/GPU cooperation. ExtremeTech. Ziff Davis. 2013-08-26. 
  5. ^ 5.0 5.1 Heterogeneous System Architecture: Purpose and Outlook. gpuscience.com. 2012-11-09 [2014-05-24]. (原始內容存檔於2014-02-01). 
  6. ^ Heterogeneous system architecture: Multicore image processing using a mix of CPU and GPU elements. Embedded Computing Design. [23 May 2014]. 
  7. ^ Kaveri microarchitecture. SemiAccurate. 2014-01-15. 
  8. ^ Michael Larabel. AMDKFD Driver Still Evolving For Open-Source HSA On Linux. Phoronix. July 21, 2014 [January 21, 2015]. 
  9. ^ 9.0 9.1 Linux kernel 3.19, Section 1.3. HSA driver for AMD GPU devices. kernelnewbies.org. February 8, 2015 [February 12, 2015]. 
  10. ^ HSA-Runtime-Reference-Source/README.md at master. github.com. November 14, 2014 [February 12, 2015]. 
  11. ^ Alex Woodie. HSA Foundation Aims to Boost Java’s GPU Prowess. HPCwire. 26 August 2013. 
  12. ^ Bolt on github. 

外部連結

[編輯]